1. Field of the Invention
The present invention relates to system LSI design support apparatus and a system LSI design support method which support assignment of the features implemented by system programs described in a high-level language to system LSIs comprising a microprocessor, a digital signal processor, and a dedicated logic circuit.
2. Description of the Related Art
Recently, it has been made possible to mount a system comprising multiple features on a single chip LSI in line with the increase in the packing density of LSI. The LSI (hereinafter referred to as a system LSI) comprises different types of processing units including a microprocessor, a digital signal processor and a dedicated logic circuit as well as a memory. Various system features are executed by appropriate processing units.
Each processing unit has a separate architecture and is tailored to execute particular processing. For example, a microprocessor (hereinafter referred to as a CPU) is tailored to determine various control information input from outside an LSI or execute processing having a complicated algorithm on a program described in a high-level language.
A digital signal processor (hereinafter referred to as a DSP) is tailored to execute a complicated arithmetic operation at high speed. A dedicated logic circuit is capable of executing a simple arithmetic operation at a high efficiency but is not fit for processing accompanied by complicated judgment conditions.
Which processing units system features are assigned to is determined by the following procedure. First, simple analysis is made based on a program describing part or whole of the system operation. In this analysis, processing time per program feature unit, that is module, or function in a high-level language such as the C language. Based on this information, the designer assigns system features to appropriate processing units. Next, the designer calculates detailed processing time and number of execution cycles per processing unit. In case there have been detected any problems up to this stage, the designer creates built-in programs in accordance with the processing units, for example programs executed by the CPU or those for the DSP as well as designs a dedicated logic circuit to calculates correct processing time.
A design support method has been proposed to support the aforementioned series of processes (refer to for example the Japanese Patent Laid-Open No. 160949/1997, pages 4–14, FIG. 1). According to the Japanese Patent Laid-Open No. 160949/1997, an object code obtained by compiling a program described in a high-level language comprising a plurality of functions is input to execute a simulation and record/output the processing time and processing count for a prespecified section thereby selecting a section to be implemented in hardware, or processed using a dedicated logic, depending on the length of the processing time.
While the related art method supports assignment of a particular system feature to a dedicated logic based on the processing time, the method has no information determined in accordance with other standards. In other words, in case the processing time is satisfied by the CPU in implementing Feature which mainly uses simple arithmetic operation in some system features, there is no need to perform processing by way of a dedicated logic. In such a case, the CPU actually executes processing which is not suitable for its architecture. This results in large amounts of unnecessary operations thus inviting an increase in the power consumption.
Another example is: in case the CPU cannot implement Function B having a complicated algorithm using multiple conditional judgments in some system features within a predetermined time, Feature B is assigned to a dedicated logic. The problem is that a multistage state transition control circuit is required to implement such complicated processing by using a dedicated logic. This scales up the dedicated logic circuit and the corresponding design period will be enormous.